Ben Eater's CPU
Being a student with an unexpected abundance of time in quarantine, as a productive distraction from the COVID-disrupted classes mutually half-given up on I
- binge watched Ben Eater's YouTube series on CPU implementation
- bought and built Ben's kit
- (much later) built an emulator for the CPU in Verilog
- (much later again) recycled it for parts of a new project
The kit cost had an extremely good educational value to me compared to my tuition that semester. I really admire Ben's design and educational material for its ability to break down a much harder and broader problem into a (like the original 1970s design that inspired it, SAP, "Simple As Possible") solution.
Hand-wiring each connection with an image of its purpose makes the hierarchy of components very apparent, like seeing the control logic running the inert pieces at the end of wire bundles.
Not willing to pack and move this thing yet one more time, I stripped the pieces apart and implemented it in the hardware description language Verilog. This different perspective on the same design was really effective for transferring and connecting my understanding from Ben's explanations to Verilog concepts.